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ADS5294 Fiches technique(PDF) 24 Page - Texas Instruments

No de pièce ADS5294
Description  ADS5294 Octal-Channel 14-Bit 80-MSPS High-SNR and Low-Power ADC
PDF  82 Pages
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Fabricant  TI2 [Texas Instruments]
Site Internet  https://www.ti.com
Logo TI2 - Texas Instruments

ADS5294 Fiches technique(HTML) 24 Page - Texas Instruments

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70
75
80
85
90
95
100
10
20
30
40
50
60
70
Frequency of Aggressor Channel (MHz)
Far Channel
Near Channel
−160
−150
−140
−130
−120
−110
0.01
0.1
1
10
100
Frequency Offset (kHz)
74.0
74.5
75.0
75.5
76.0
76.5
77.0
−40
−20
0
20
40
60
80
Temperature (°C)
AVDD=1.65V
AVDD=1.7V
AVDD=1.8V
AVDD=1.9V
AVDD=1.95V
78
79
80
81
82
83
84
85
86
87
88
−40
−20
0
20
40
60
80
Temperature (°C)
AVDD=1.65V
AVDD=1.7V
AVDD=1.8V
AVDD=1.9V
AVDD=1.95V
35
40
45
50
55
60
65
82
82.5
83
83.5
84
84.5
85
85.5
86
73
73.5
74
74.5
75
75.5
76
76.5
77
Input Clock Duty Cycle (%)
SFDR
SNR
0.80
0.85
0.90
0.95
1.00
1.05
1.10
80
81
82
83
84
85
86
87
88
89
90
73
73.5
74
74.5
75
75.5
76
76.5
77
77.5
78
Analog Input Common−mode voltage (V)
SFDR
SNR
Fin = 5 MHz
24
ADS5294
SLAS776E – NOVEMBER 2011 – REVISED APRIL 2018
www.ti.com
Product Folder Links: ADS5294
Submit Documentation Feedback
Copyright © 2011–2018, Texas Instruments Incorporated
Typical Characteristics (continued)
Typical values are at 25°C, AVDD = 1.8 V, LVDD = 1.8 V, 50% clock duty cycle, –1-dBFS differential analog input, 14 Bit/ 80
MSPS, ADC is configured in the internal reference mode, unless otherwise noted.
Figure 20. Performance vs Input Clock Duty
CyclePerformance vs Input Clock Duty Cycle
Figure 21. Performance vs Input VCM
Figure 22. Signal-To-Noise Ratio vs Temperature
Figure 23. Spurious-Free Dynamic Range vs Temperature
Figure 24. Crosstalk vs Frequency
Figure 25. Phase Noise for 5-MHz Input Signal, Sample Rate
= 80 MSPS



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