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TMP93CS32F Fiches technique(PDF) 83 Page - Toshiba Semiconductor |
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TMP93CS32F Fiches technique(HTML) 83 Page - Toshiba Semiconductor |
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83 / 180 page ![]() TMP93CS32 2004-02-10 93CS32-81 When the double buffer of TREG2 is enabled in this mode, the value of register buffer will be shifted in TREG2 each time TREG3 matches UC2. Use of the double buffer makes easy the handling of low duty waves (when duty is varied). Figure 3.7.15 Operation of Register Buffer Q2 Q1 Match with TREG2 and up counter Match with TREG 3 Q3 Q2 (Up counter = Q1)(Up counter = Q2) Shift from register buffer TREG2 (Register buffer) write TREG2 (Value to be compared) Register buffer |
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