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LR4102 Fiches technique(PDF) 20 Page - LSI Computer Systems

No de pièce LR4102
Description  Microprocessor
PDF  32 Pages
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Fabricant  LSI [LSI Computer Systems]
Site Internet  http://www.lsicsi.com
Logo LSI - LSI Computer Systems

LR4102 Fiches technique(HTML) 20 Page - LSI Computer Systems

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TinyRISC LR4102 Microprocessor
Table 8
AC Input Timing with respect to rising edge of PBCLKP1
1. With 65 pF load
2. This signal is related to the system clock, but not to the FAPI bus (see
Figure 5 note).
3. This signal is related to both the system clock and the FAPI bus (see
Figure 5 note).
Input Signal
Setup
Hold
Units
CBEN[3:0]
7.2
1.4
ns
DEVSELN
4.7
2.2
ns
FADP[31:0]3
2.9
2.7
ns
FRAMEN
7.4
2.2
ns
GP[5:0]2
2.8
2.6
ns
GPIO[3:0]2
1.8
2.8
ns
IRDYN
7.5
1.9
ns
REQN
3.5
1.5
ns
STOPN
4.7
1.7
ns
TRDYN
4.6
2.0
ns
Table 9
AC Input Timing with respect to rising edge of SDCLKP1
1. With 65 pF load.
Input Signal
Setup
Hold
Units
FADP[31:0]
2.0
3.4
ns
Table 10
AC Input Timing with respect to rising edge of TCK
Input
Setup
Hold
Units
TDI_DINT
1.9
1.1
ns
TMS
1.6
0.7
ns



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