CC2500-RTR1 datasheet(56/84 Pages) TI

56 / 84 page

CC2500

PRELIMINARY Data Sheet (Rev.1.2)

SWRS040A

Page 56 of 83

0x03: FIFOTHR – RX FIFO and TX FIFO thresholds

Bit

Field Name

Reset

R/W

Description

7:4

Reserved

Write 0 for compatibility with possible future extensions

3:0

FIFO_THR[3:0]

7 (0111)

R/W

Set the threshold for the TX FIFO and RX FIFO. The threshold

is exceeded when the number of bytes in the FIFO is equal to

or higher than the threshold value.

Setting

Bytes in TX FIFO

Bytes in RX FIFO

0 (0000)

1 (0001)

2 (0010)

3 (0011)

4 (0100)

5 (0101)

6 (0110)

7 (0111)

8 (1000)

9 (1001)

10 (1010)

11 (1011)

12 (1100)

13 (1101)

14 (1110)

15 (1111)

0x04: SYNC1 – Sync word, high byte

Bit

Field Name

Reset

R/W

Description

7:0

SYNC[15:8]

211 (0xD3)

R/W

8 MSB of 16-bit sync word

0x05: SYNC0 – Sync word, low byte

Bit

Field Name

Reset

R/W

Description

7:0

SYNC[7:0]

145 (0x91)

R/W

8 LSB of 16-bit sync word

0x06: PKTLEN – Packet length

Bit

Field Name

Reset

R/W

Description

7:0

PACKET_LENGTH

255 (0xFF)

R/W

Indicates the packet length when fixed length packets

are enabled. If variable length packets are used, this

value indicates the maximum length packets allowed.

CC2500-RTR1 Fiches technique(PDF) 56 Page - Texas Instruments

CC2500-RTR1 Fiches technique(HTML) 56 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84

Fiches technique Télécharger

Lien URL