SC1100 datasheet(2/348 Pages) NSC

2 / 348 page

www.national.com

Revision 1.1

Features

General Features

■ 32-bit x86 processor, up to 300 MHz, with MMX instruc-

tion set support

■ Memory controller with 64-bit SDRAM interface

■ PC/AT functionality

■ PCI bus controller

■ IDE interface, two channels

■ USB, three ports, OHCI (OpenHost Controller Interface)

version 1.0 compliant

■ Audio, AC97/AMC97 version 2.0 compliant

■ National’s Virtual System Architecture® technology

(VSA™) support

■ Power management, ACPI (Advanced Configuration

Power Interface) version 1.0 compliant

■ Package:

— 388-Terminal TEPBGA (Thermally Enhanced Plastic

Ball Grid Array)

GX1 Processor Module

■ CPU Core:

— 32-bit x86 processor, up to 300 MHz, with MMX

instruction set support

— 16 KB unified L1 cache

— Integrated Floating Point Unit (FPU)

— Re-entrant SMM (System Management Mode)

enhanced for VSA

■ Memory Controller:

— 64-bit SDRAM interface

— 78 to 100 MHz frequency range

— Direct interface with CPU/cache

— Supports clock suspend and power-down/self-

refresh

— Up to 8 SDRAM devices or one DIMM/SODIMM

Core Logic Module

■ Audio Codec Interface:

— AC97/AMC97 (Rev. 2.0) codec interface

— Legacy audio emulation using XpressAUDIO

— Six DMA channels

■ PC/AT Functionality:

— Programmable Interrupt Controller (PIC), 8259A-

equivalent

— Programmable Interval Timer (PIT), 8254-equivalent

— DMA Controller (DMAC), 8237-equivalent

■ Power Management:

— ACPI 1.0 compliant

— Sx state control of three power planes

— Cx/Sx state control of clocks and PLLs

— Thermal event input

— Wakeup event support:

– Three general-purpose events

– UART RI# signal

– Infrared (IR) event

■ General Purpose I/Os (GPIOs):

— Six (6) dedicated GPIO signals

— 24 multiplexed GPIO signals

■ Low Pin Count (LPC) Bus Interface:

— Specification version 1.0 compatible

■ PCI Bus Interface:

— PCI version 2.1 compliant with wakeup capability

— 32-bit data path, up to 33 MHz

— Glueless interface for an external PCI device

— Supports four PCI bus master devices

— Supports four PCI interrupts

— Rotating priority

— 3.3V signal support only

■ Sub-ISA Bus Interface:

— Supports up to four chip selects for external memory

devices

– Up to 16 MB addressing

– Supports a chip select for ROM or Flash EPROM

boot device, up to 16 MB

– A chip select for one of:

–

M-Systems’ DiskOnChip DOC2000 Flash file

system

–

NAND EEPROM

— Supports up to two chip selects for external I/O

devices

– 8-bit (optional 16-bit) data bus width

– Cycle multiplexed with PCI signals

– Is not the subtractive decode agent

■ IDE Interface:

— Two IDE channels for up to four external IDE devices

— Supports ATA-33 synchronous DMA mode transfers,

up to 33 MB/s

■ Universal Serial Bus (USB):

— USB OpenHCI 1.0 compliant

— Three ports

SC1100 Fiches technique(PDF) 2 Page - National Semiconductor (TI)

SC1100 Fiches technique(HTML) 2 Page - National Semiconductor (TI)

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Fiches technique Télécharger

Lien URL