MPC602ECSLASHD datasheet(12/26 Pages) NXP

No de pièce	MPC602EC/D

Description	PowerPC 602TM RISC Microprocessor Hardware Specification

PDF	26 Pages

Scroll/Zoom	100%

Fabricant	NXP [NXP Semiconductors]

Site Internet	http://www.nxp.com

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PowerPC 602 RISC Microprocessor Hardware Specifications

Figure 4. Output Timing Diagram

1.3.3 JTAG AC Timing Speciﬁcations

Table 9 provides the JTAG AC timing speciﬁcations.

Table 9. JTAG AC Timing Specifications (Independent of SYSCLK)

Vdd = 3.3

± 10% V dc, GND = 0 V dc, CL = 50 pF, 0 ≤ TJ ≤ 105 °C

Num

Characteristic

Min

Max

Unit

Notes

TCK frequency of operation

MHz

TCK cycle time

62.5

—

TCK clock pulse width measured at 1.4 V

—

TCK rise and fall times

TRST setup time to TCK rising edge

—

TRST assert time

—

Boundary-scan input data setup time

—

Boundary-scan input data hold time

—

TCK to output data valid

SYSCLK

TS, BB, BR,

VM = Midpoint Voltage (1.4 V)

ARTRY

AD0–AD63

RESETO,

QREQ,

CKSTP_OUT

TDO

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

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