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SH7041A Fiches technique(PDF) 708 Page - Renesas Technology Corp

No de pièce SH7041A
Description  Renesas 32-Bit Single-Chip RISC Microprocessor SuperH RISC engine Family/SH7040 Series(CPU Core SH-2)
PDF  923 Pages
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Fabricant  RENESAS [Renesas Technology Corp]
Site Internet  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

SH7041A Fiches technique(HTML) 708 Page - Renesas Technology Corp

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Table 21.1
Operating Modes and ROM
Mode Setting Pin
Operating Mode
MD3 MD2 MD1 MD0 Area 0
Mode 0 (MCU mode 0)
**
0
0
On-chip ROM invalid, external 8-bit space (112 pin
and 120 pin), external 16-bit space (144 pin)
Mode 1 (MCU mode 1)
**
0
1
On-chip ROM invalid, external 16-bit space (112
pin and 120 pin), external 32-bit space (144 pin)
Mode 2 (MCU mode 2)
**
1
0
On-chip ROM valid, with an external space (bus
width setting is performed by the bus state
controller)
Mode 3 (MCU mode 3)
**
1
1
On-chip ROM valid, single chip mode
Mode 7 (PROM mode)
1
1
1
1
—
0: Low
1: High
*: Refer to section 3, Operating Modes.
With the PROM version, programs can be written in the same manner as with an ordinary
EPROM by setting the LSI to PROM mode and using a standard EPROM writer.
21.2
PROM Mode
21.2.1
PROM Mode Settings
When programming the on-chip PROM, set the pins as shown in figure 21.2, 21.3, or 21.4, and
perform the programming in PROM mode.
21.2.2
Socket Adapter Pin Correspondence and Memory Map
Connect the socket adapter to the SH7040 series chip as shown in figure 21.2 or 21.3. This will
allow the on-chip PROM to be programmed in the same manner as an ordinary 32-pin EPROM
(HN27C101). Figures 21.2, 21.3, and 21.4 show the correspondence between the SH7040 Series
pins and HN27C101 pins. Figure 21.5 is a memory map of the on-chip ROM.



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