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SH7041A Fiches technique(PDF) 703 Page - Renesas Technology Corp

No de pièce SH7041A
Description  Renesas 32-Bit Single-Chip RISC Microprocessor SuperH RISC engine Family/SH7040 Series(CPU Core SH-2)
PDF  923 Pages
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Fabricant  RENESAS [Renesas Technology Corp]
Site Internet  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

SH7041A Fiches technique(HTML) 703 Page - Renesas Technology Corp

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Section 20 64/128/256kB Mask ROM
20.1
Overview
This LSI is available with 64 kbytes, 128 kbytes, or 256 kbytes of on-chip ROM. The on-chip
ROM is connected to the CPU, direct memory access controller (DMAC) and data transfer
controller (DTC) through a 32-bit data bus (figures 20.1, 20.2, and 20.3). The CPU, DMAC, and
DTC can access the on-chip ROM in 8, 16, and 32-bit widths. Data in the on-chip ROM can
always be accessed in one cycle.
H'00000000
H'00000004
H'00000001
H'00000005
H'00000002
H'00000006
H'00000003
H'00000007
H'0000FFFC
H'0000FFFD
H'0000FFFE
H'0000FFFF
On-chip ROM
Internal data bus (32 bits)
Figure 20.1 Mask ROM Block Diagram (64-kbyte Version)



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