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K32L2AX Fiches technique(PDF) 54 Page - NXP Semiconductors |
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K32L2AX Fiches technique(HTML) 54 Page - NXP Semiconductors |
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54 / 96 page ![]() J2 J3 J3 J4 J4 SWD_CLK (input) Figure 9. Serial wire clock input timing J11 J12 J11 J9 J10 Input data valid Output data valid Output data valid SWD_CLK SWD_DIO SWD_DIO SWD_DIO SWD_DIO Figure 10. Serial wire data timing 8.2 System modules There are no specifications necessary for the device's system modules. 8.3 Clock modules 8.3.1 System Clock Generation (SCG) specifications Peripheral operating requirements and behaviors 54 K32 L2A Microcontroller with 512 KB Flash and 128 KB SRAM, Rev. 3, 02/2021 NXP Semiconductors |
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