PIC24H datasheet(49/290 Pages) MICROCHIP

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Preliminary

DS70175D-page 49

PIC24H

TABLE 3-32:

FUNDAMENTAL ADDRESSING MODES SUPPORTED

3.3.3

MOVE INSTRUCTIONS

Move instructions provide a greater degree of address-

ing flexibility than other instructions. In addition to the

Addressing modes supported by most MCU instruc-

tions, move instructions also support Register Indirect

with Register Offset Addressing mode, also referred to

as Register Indexed mode.

In summary, the following Addressing modes are

supported by move instructions:

• Register Direct

• Register Indirect

• Register Indirect Post-modified

• Register Indirect Pre-modified

• Register Indirect with Register Offset (Indexed)

• Register Indirect with Literal Offset

• 8-bit Literal

• 16-bit Literal

3.3.4

OTHER INSTRUCTIONS

Besides the various addressing modes outlined above,

some instructions use literal constants of various sizes.

For example, BRA (branch) instructions use 16-bit

signed literals to specify the branch destination directly,

whereas the DISI instruction uses a 14-bit unsigned

literal field. In some instructions, the source of an oper-

and or result is implied by the opcode itself. Certain

operations, such as NOP, do not have any operands.

3.4

Interfacing Program and Data

Memory Spaces

The PIC24H architecture uses a 24-bit wide program

space and a 16-bit wide data space. The architecture is

also a modified Harvard scheme, meaning that data

can also be present in the program space. To use this

data successfully, it must be accessed in a way that

preserves the alignment of information in both spaces.

Aside from normal execution, the PIC24H architecture

provides two methods by which program space can be

accessed during operation:

• Using table instructions to access individual bytes

or words anywhere in the program space

• Remapping a portion of the program space into

the data space (Program Space Visibility)

Table instructions allow an application to read or write

to small areas of the program memory. This capability

makes the method ideal for accessing data tables that

need to be updated from time to time. It also allows

access to all bytes of the program word. The remap-

ping method allows an application to access a large

block of data on a read-only basis, which is ideal for

look ups from a large table of static data. It can only

access the least significant word of the program word.

3.4.1

ADDRESSING PROGRAM SPACE

Since the address ranges for the data and program

spaces are 16 and 24 bits, respectively, a method is

needed to create a 23-bit or 24-bit program address

from 16-bit data registers. The solution depends on the

interface method to be used.

For table operations, the 8-bit Table Page register

(TBLPAG) is used to define a 32K word region within

the program space. This is concatenated with a 16-bit

EA to arrive at a full 24-bit program space address. In

this format, the Most Significant bit of TBLPAG is used

to determine if the operation occurs in the user memory

(TBLPAG<7> = 0) or the configuration memory

(TBLPAG<7> = 1).

Addressing Mode

Description

File Register Direct

The address of the file register is specified explicitly.

The contents of a register are accessed directly.

The contents of Wn forms the EA.

The contents of Wn forms the EA. Wn is post-modified (incremented or

decremented) by a constant value.

Wn is pre-modified (incremented or decremented) by a signed constant value

to form the EA.

The sum of Wn and a literal forms the EA.

Note:

For the MOV instructions, the Addressing

mode specified in the instruction can differ

for

the

source

and

destination

EA.

However, the 4-bit Wb (Register Offset)

field is shared between both source and

destination (but typically only used by

one).

Note:

Not

all

instructions

support

all

the

Addressing modes given above. Individual

instructions may support different subsets

of these Addressing modes.

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