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LTM4633 Fiches technique(PDF) 16 Page - Linear Technology

No de pièce LTM4633
Description  Triple 10A Step-DownDC/DC 關Module Regulator
PDF  32 Pages
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Fabricant  LINER [Linear Technology]
Site Internet  http://www.linear.com
Logo LINER - Linear Technology

LTM4633 Fiches technique(HTML) 16 Page - Linear Technology

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LTM4633
16
4633f
For more information www.linear.com/LTM4633
applicaTions inForMaTion
Stability Compensation
TheLTM4633hasalreadybeeninternallycompensatedfor
all output voltages. Table 5 is provided for most applica-
tion requirements with verified stability. LTpowerCAD is
available for other control loop optimization.
Run Enable
The RUN 1, 2, 3 pins have an enable threshold of 1.4V
maximum, typically 1.3V with 175mV of hysteresis. They
control the turn-on of their respective channel. There is
a 10k resistor on each pin to ground. The RUN pins can
be pulled up to VIN for 5V operation, or a resistor can be
placed on the pins and connected to VIN for higher than 5V
input. This resistor can be set along with the onboard 10k
resistor such that an undervoltage lockout (UVLO) level
can be programmed to shut down a particular regulator
channel if VIN falls below a set value. Use the equation:
R
=
10k UVLO–1.3V
(
)
1.3V
where R is the resistor from the RUN pin to VIN to set the
UVLO trip point. For example, if the UVLO point is to be
6.25V while operating at 12V input:
R
=
10k 6.25V –1.3V
(
)
1.3V
≈ 38.3k
See the Typical Application circuits in Figure 17. The RUN
pins must not go above 6V maximum voltage. The RUN
pins have to be pulled up to enable the regulators.
SW Pins
The SW pins are generally used for testing purposes by
monitoring the pin of interest. The SW pins can also be
used to dampen out switch node ringing caused by LC
parasiticsintheswitchedcurrentpath.UsuallyaseriesR-C
combination is used called a snubber circuit. The resistor
will dampen the resonance and the capacitor is chosen to
only affect the high frequency ringing across the resistor.
If the stray inductance or capacitance can be measured
or approximated then a somewhat analytical technique
can be used to select the snubber values. The inductance
is usually easier to predict. It combines the PowerPath™
board inductance in combination with the MOSFET inter-
connect inductance.
First, the SW pin can be monitored using a wide band-
width scope with a high frequency scope probe. The ring
frequency can be measured for its value. The impedance,
Z, can be calculated:
Z(L) = 2π • f • L
where f is the resonant frequency of the ring, and L is the
total parasitic inductance in the switch path. If a resistor
is selected that is equal to Z, then the ringing should be
dampened. The snubber capacitor value is then chosen
so that its impedance is equal to the resistor at the ring
frequency:
Z(C) =
1
2
π • f •C
These values are a good place to start with. Modification to
these components should be made to attenuate the ring-
ing without lowering the regulator’s conversion efficiency.
INTVCC and EXTVCC
The LTM4633 has an onboard linear regulator fed by
CNTL_PWR which delivers a roughly 5V output at INTVCC
to power the internal controller and MOSFET drivers for all
three regulator channels. CNTL_PWR requires a voltage
between 4.7V to 16V. Apply a 4.7µF ceramic capacitor
between INTVCC and ground for decoupling. If the volt-
age supplied to CNTL_PWR is ≤ 5.5V, connect INTVCC to
CNTL_PWR. Otherwise, INTVCC should be left floating. To
eliminate power loss in the onboard linear regulator and
improve efficiency connect a supply from 4.7V to 6V at
EXTVCC. Biasing EXTVCC will reduce the power loss in the
internal LDO by (VCNTL_PWR – 5V) • 70mA. If EXTVCC is
used add a 1µF ceramic capacitor to ground at EXTVCC and



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