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L9678P Fiches technique(PDF) 34 Page - STMicroelectronics |
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L9678P Fiches technique(HTML) 34 Page - STMicroelectronics |
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34 / 203 page ![]() Start-up power control L9678P, L9678P-S 34/203 DocID029274 Rev 3 Figure 17. VSF control logic 4.4 Reset functions The device provides reset logic to safely control system operation in the event of internal ECU failures. Several internal reset signals are generated depending on the type of failure detected. In the following figure, the voltage monitoring diagram is shown. BG_ERR reports error on the bandgap reference voltage, VREG_ERR reports errors on any of the internal regulators (VINT3V3 for 3.3 V analog circuitry, CVDD for 3.3 V digital circuitry), VDD3V3_ERR and VDD5_ERR report errors on VDD3V3 and VDD5 regulators, respectively. Figure 18. Internal voltage errors |
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