RT4832AWSC datasheet(23/26 Pages) RICHTEK

23 / 26 page

RT4832A

is a registered trademark of Richtek Technology Corporation.

DS4832A-00

January

2017

www.richtek.com

be triggered and then the LED driver will be shut down.

The OTP hysteresis is 15

C. Once the junction

temperature reduces below the over temperature

protection threshold by 25

C, the IC will enter normal

operation again.

Thermal Considerations

The junction temperature should never exceed the

absolute maximum junction temperature TJ(MAX), listed

under Absolute Maximum Ratings, to avoid permanent

damage to the device. The maximum allowable power

dissipation depends on the thermal resistance of the IC

package, the PCB layout, the rate of surrounding

airflow, and the difference between the junction and

ambient

temperatures.

The

maximum

power

dissipation can be calculated using the following

formula :

PD(MAX) = (TJ(MAX) - TA) / JA

where TJ(MAX) is the maximum junction temperature,

TA is the ambient temperature, and JA is the

junction-to-ambient thermal resistance.

For continuous operation, the maximum operating

junction temperature indicated under Recommended

Operating Conditions is 125°C. The junction-to-ambient

thermal resistance,

JA, is highly package dependent.

For a WL-CSP-30B 2.24x2.64 (BSC) package, the

thermal resistance,

JA, is 31.7°C/W on a standard

JEDEC

51-7

high

effective-thermal-conductivity

four-layer test board. The maximum power dissipation

at TA = 25°C can be calculated as below :

PD(MAX) = (125°C - 25°C) / (31.7°C/W) = 3.15W for a

WL-CSP-30B 2.24x2.64 (BSC) package.

The maximum power dissipation depends on the

operating ambient temperature for the fixed TJ(MAX)

and the thermal resistance,

JA. The derating curves in

Figure 6 allows the designer to see the effect of rising

ambient

temperature

the

maximum

power

dissipation.

Figure 6. Derating Curve of Maximum Power

Dissipation

Layout Considerations

For high frequency switching power supplies, the PCB

layout is important to get good regulation, high

efficiency and stability. The following descriptions are

the guidelines for better PCB layout.



For good regulation, place the power components

as close to chip as possible. The traces should be

wide

and

short

enough

especially

for

the

high-current loop.



Minimize the size of the LX node and route on the

top layer only.



Place the capacitor CIN as close to VIN pin as

possible.



Place the CPOS, CCPOUT capacitor as close to

the output pins as possible. Also place the charge

pump flying capacitor close to the RT4832A.



Place the capacitor CFLED as close to FLEDOUT

pin as possible. Connect the Flash LED cathode

directly to the FLEDGND pin of the RT4832A.



Route the LED return with a dedicated path and

keep the LED1 and LED2 path short and close to

RT4832A for the good LED current performance.

0.0

0.4

0.8

1.2

1.6

2.0

2.4

2.8

3.2

3.6

4.0

100

125

Ambient Temperature (°C)

Four-Layer PCB

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