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RT4832AWSC Fiches technique(PDF) 8 Page - Richtek Technology Corporation

No de pièce RT4832AWSC
Description  Sub PMIC with Dual-Output Boost Converter
PDF  26 Pages
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Fabricant  RICHTEK [Richtek Technology Corporation]
Site Internet  http://www.richtek.com
Logo RICHTEK - Richtek Technology Corporation

RT4832AWSC Fiches technique(HTML) 8 Page - Richtek Technology Corporation

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RT4832A
Copyright © 2017 Richtek Technology Corporation. All rights reserved.
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
DS4832A-00
January
2017
8
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
DSV Switching Frequency
fDSV
0.9
1
1.1
MHz
Maximum Duty Cycle
DMXDSV
90
93
--
%
DSV N-MOSFET Ron
RonNDSV
0.05
0.3
0.6
DSV P-MOSFET Ron
RonPDSV
0x0F[5:0] = 010100
0.05
0.5
1
Charge Pump Equivalent
Resistance
Reqx1
VLCMOUT = 5.2V, IOUT = 50mA
--
2
--
VPOS Discharge Resistor
RDP
0x0C[4] = 1
--
70
--
VCPOUT Discharge Resistor
RDN
0x0C[3] = 1
--
20
--
LCMOUT Current Limit
IOCPLCM
0x0E[5:0] = 010100
0.88
1.1
1.32
A
POS Short Protection Voltage
VSCPP
--
0.8 x
VPOS
--
V
CPOUT Short Protection
Voltage
VSCPN
--
0.25
0.8 x
(
VCP
OUT)
--
V
Logic Control (PWM, EN, ENP, ENM, SCL, SDA, TXMASK, STRB)
Input Logic Low
VIL
--
--
0.4
V
Input Logic High
VIH
1.4
--
--
V
Note 1.
Stresses beyond those listed “Absolute Maximum Ratings” may cause permanent damage to the device. These are
stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the
operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may affect
device reliability.
Note 2.
JA is measured under natural convection (still air) at TA = 25°C with the component mounted on a high
effective-thermal-conductivity four-layer test board on a JEDEC 51-7 thermal measurement standard.
Note 3. Devices are ESD sensitive. Handling precaution recommended.
Note 4. The device is not guaranteed to function outside its operating conditions.



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