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STUSB1602 Fiches technique(PDF) 42 Page - STMicroelectronics |
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STUSB1602 Fiches technique(HTML) 42 Page - STMicroelectronics |
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42 / 55 page ![]() Application STUSB1602 42/55 DocID028319 Rev 2 VBUS power path assertion Table 25. Conditions for VBUS power path assertion in source power role Pin Electrical value Operation conditions Comment Type-C attached state VDD pin monitoring VBUS_SENSE pin monitoring VBUS_EN_SRC 0 Attached.SRC or UnorientedDebug Accessory.SRC or OrientedDebug Accessory.SRC VDD < OVLO if VDD pin is supplied VBUS is within valid voltage range The signal is asserted only if all the valid operation conditions are met HiZ Any other state VDD > OVLO if VDD pin is supplied VBUS is out of valid voltage range The signal is de-asserted when at least one non valid operation condition is met. Table 26. Conditions for VBUS power path assertion in sink power role Pin Electrical value Operation conditions Comment Type-C attached state VDD pin monitoring VBUS_SENSE pin monitoring VBUS_EN_SNK 0 Attached.SNK or Debug Accessory.SNK Not applicable VBUS is within valid voltage range The signal is asserted only if all the valid operation conditions are met HiZ Any other state Not applicable VBUS is out of valid voltage range The signal is de-asserted when at least one non valid operation condition is met. |
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