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L9779WD-SPI Fiches technique(PDF) 36 Page - STMicroelectronics |
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L9779WD-SPI Fiches technique(HTML) 36 Page - STMicroelectronics |
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36 / 141 page ![]() Functional description L9779WD-SPI 36/141 DocID027721 Rev 2 Capacitor legend: 1H 50 V 1E 25 V 1C 16 V X7R -40 to 125 °C ±15% K -40 to 125 °C ±10% Note: Others N-MOSFET can be used provided that they have similar threshold voltage and input capacitance; however regulator transient performances may have deviation to be checked. PCB layout Note: The Cin capacitor on VB line should be put as close as possible to the drain of external MOS. The suggestion PCB layout is as below. Figure 17. Circuit and PCB layout suggested V3V3 CV3V3 External V3V3 capacitor 1 µF - 10 µF C2012X7R1E105K--1µF C1608X7R1C105K--1µF C3216X7R1H105K--1µF C3225X7R1E106K--10µF C3225X7R1C106K--10µF CP CP External charge pump capacitor -20% 100nF +20% - Table 12. Voltage regulators external components required (continued) Pin Symbol Parameter Min Typ Max Suggested part number |
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