[AK09916]

015007392-E-02

2015/12

- 17 -

WRITE Instruction

10.1.2.

When the R/W bit is set to “0”, AK09916 performs write operation.

In write operation, AK09916 generates an acknowledge after receiving a start condition and the first byte

(slave address) then receives the second byte. The second byte is used to specify the address of an internal

control register and is based on the MSB-first configuration.

MSB

LSB

A7

A6

A5

A4

A3

A2

A1

A0

Figure 10.5. Register Address

After receiving the second byte (register address), AK09916 generates an acknowledge then receives the

third byte.

The third and the following bytes represent control data. Control data consists of 8 bits and is based on the

MSB-first configuration. AK09916 generates an acknowledge after every byte is received. Data transfer

always stops with a stop condition generated by the master.

MSB

LSB

D7

D6

D5

D4

D3

D2

D1

D0

Figure 10.6. Control Data

AK09916 can write multiple bytes of data at a time.

After reception of the third byte (control data), AK09916 generates an acknowledge then receives the next

data. If additional data is received instead of a stop condition after receiving one byte of data, the address

counter inside the LSI chip is automatically incremented and the data is written at the next address.

The address is incremented from 00h to 18h, from 30h to 32h. When the address is 00h to 18h, the address is

incremented 00h

 01h  02h  03h  10h  11h ...  18h,and the address goes back to 00h after

18H. When the address is 30h to 32h, the address goes back to 30h after 32h.

Actual data is written only to Read/Write registers (Table 11.2. ).

SDA

S

T

A

R

T

A

C

K

A

C

K

S

Slave

Address

A

C

K

Register

Address(n)

Data(n)

P

S

T

O

P

Data(n+x)

A

C

K

Data(n+1)

A

C

K

A

C

K

R/W="0"

Figure 10.7. WRITE Instruction