PCA2000 datasheet(13/19 Pages) PHILIPS

13 / 19 page

2003 Dec 17

Philips Semiconductors

Product speciﬁcation

32 kHz watch circuit with programmable

adaptive motor pulse

PCA2000; PCA2001

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 60134).

Notes

1. For writing to the OTP cells, the supply voltage VDD can be raised to a maximum of 12 V for a period of 1 second.

2. Connecting the battery with reversed polarity does not destroy the circuit, but in this condition a large current flows,

which rapidly discharges the battery.

HANDLING

Inputs and outputs are protected against electrostatic discharges in normal handling. However to be totally safe, it is

advised to undertake handling precautions appropriate to handling MOS devices. Advice can be found in

“Data handbook IC16: General; handling MOS devices”.

CHARACTERISTICS

VDD = 1.55 V; VSS =0V; fosc = 32.768 kHz; Tamb =25 °C; quartz crystal: RS =40kΩ,C1 = 2 to 3 fF, CL = 8.2 pF; unless

otherwise speciﬁed.

SYMBOL

PARAMETER

CONDITIONS

MIN.

MAX.

UNIT

VDD

supply voltage

VSS = 0 V; notes 1 and 2

−1.8

+7.0

all input voltages

VSS − 0.5

VDD + 0.5

Tamb

ambient temperature

−10

+60

°C

Tstg

storage temperature

−30

+100

°C

to(sc)

output short-circuit duration

indeﬁnite

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

Supply

VDD

supply voltage

normal operating mode;

Tamb = −10 to +60 °C

1.10

1.55

3.60

∆VDD

supply voltage variation

∆V/∆t=1V/µs

−−

0.25

IDD

supply current

between motor pulses

−

120

between motor pulses at VDD = 3.5 V

−

120

180

Tamb = −10 to +60 °C

−−

200

stop mode; pad RESET connected to VDD

−

100

135

Motor output

Vsat

saturation voltage

RM =2kΩ; Tamb = −10 to +60 °C; note 1

−

150

200

Zsc

short-circuit impedance

between motor pulses; Imotor <1mA

−

200

300

Ω

Oscillator

Vstart

starting voltage

1.1

−−

transconductance

VOSCIN ≤ 50 mV (p-p)

−µS

tosc

start-up time

−

0.3

0.9

∆f/f

frequency stability

∆VDD = 100 mV

−

0.05

0.20

ppm

Cint

integrated load capacitance

4.3

5.2

6.3

Rpar

parasitic resistance

allowed resistance between adjacent pads 20

−−

Ω

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