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PCA2000 Fiches technique(PDF) 12 Page - NXP Semiconductors

No de pièce PCA2000
Description  32 kHz watch circuit with programmable adaptive motor pulse
PDF  19 Pages
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Fabricant  PHILIPS [NXP Semiconductors]
Site Internet  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

PCA2000 Fiches technique(HTML) 12 Page - NXP Semiconductors

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2003 Dec 17
12
Philips Semiconductors
Product specification
32 kHz watch circuit with programmable
adaptive motor pulse
PCA2000; PCA2001
Measurement of oscillator frequency and inhibit time
The output of the two measuring states can either be
monitored directly at pad RESET or as a modulation of the
supply voltage (a modulating resistor of 30 k
Ω is
connected between VDD and VSS when the signal at
pad RESET is at HIGH-level).
You must follow the supply voltage modulation (see
Fig.10)) in order to guarantee the correct start up of the
circuit during production and testing.
Measuring states:
• State 1: quartz crystal oscillator frequency divided by
1024; state 1 starts with a pulse to VP and ends with a
second pulse to VP
• State 2: inhibit time (see Figs 11 and 12); a signal with
periodicity of 31.25 + n
× 0.122 ms appears at
pad RESET and as current modulation at pad VDD.
Customer testing
Connecting pad RESET to VSS activates the test mode. In
this test mode, the motor output frequency is 8 Hz; the duty
cycle reduction and battery check occurs every second,
instead of every 4 minutes. If the supply voltage drops
below the EOL threshold voltage, the motor output
frequency is 32 Hz with the highest driving level.
EOL of battery
The supply voltage is checked every 4 minutes. If it drops
below the EOL reference (1.38 V for silver-oxide, 2.5 V for
lithium batteries), the motor steps change from one pulse
per second to a burst of four pulses every 4 seconds. The
step detection is switched off, and the motor is driven with
the highest pulse level.
Only the PCA2000 has an EOL function.
VDD
VP(stop)
t(start) > 500 ms
VSS
VDD(nom)
001aaa055
tp(stop)
Fig.10 Supply voltage at start up during production
and testing.
handbook, halfpage
MGW355
VDD
VSS
31.25 ms
+ inhibition time
Fig.11 Output waveform at pad RESET for
instruction state 2.
handbook, halfpage
VDD
VP(start)
VP(mod)
VP(stop)
t1
tp(start)
t0
VSS
VDD(nom)
MGU719
tp(stop)
Fig.12 Supply voltage modulation for starting and
stopping of instruction state 2.



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