Moteur de recherche de fiches techniques de composants électroniques
  French  ▼
ALLDATASHEET.FR

X  

Preview PDF HTML

LP8900TLE-AAEC/NOPB Fiches technique(PDF) 3 Page - Texas Instruments

Click here to check the latest version.
No de pièce LP8900TLE-AAEC/NOPB
Description  LP8900 200-mA Ultra-Low-Noise Dual LDO For RF and Analog Circuits
PDF  23 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Fabricant  TI1 [Texas Instruments]
Site Internet  http://www.ti.com
Logo TI1 - Texas Instruments

LP8900TLE-AAEC/NOPB Fiches technique(HTML) 3 Page - Texas Instruments

  LP8900TLE-AAEC/NOPB Datasheet HTML 1Page - Texas Instruments LP8900TLE-AAEC/NOPB Datasheet HTML 2Page - Texas Instruments LP8900TLE-AAEC/NOPB Datasheet HTML 3Page - Texas Instruments LP8900TLE-AAEC/NOPB Datasheet HTML 4Page - Texas Instruments LP8900TLE-AAEC/NOPB Datasheet HTML 5Page - Texas Instruments LP8900TLE-AAEC/NOPB Datasheet HTML 6Page - Texas Instruments LP8900TLE-AAEC/NOPB Datasheet HTML 7Page - Texas Instruments LP8900TLE-AAEC/NOPB Datasheet HTML 8Page - Texas Instruments LP8900TLE-AAEC/NOPB Datasheet HTML 9Page - Texas Instruments Next Button
Zoom Inzoom in Zoom Outzoom out
 3 / 23 page
background image
Top View
Bottom View
B1
GND
OUT1
A2
IN
B2
OUT2
C2
A1
EN1
B1
GND
C1
EN2
OUT1
A2
C1
EN2
A1
EN1
IN
B2
OUT2
C2
3
LP8900
www.ti.com
SNVS542E – MAY 2008 – REVISED JUNE 2016
Product Folder Links: LP8900
Submit Documentation Feedback
Copyright © 2008–2016, Texas Instruments Incorporated
5 Default Device Options
ORDERABLE NUMBER
OUT1
OUT2
LP8900TLE-3333
2.8 V
2.8 V
LP8900TLE-AAAH
2.7 V
2.7 V
LP8900TLE-AAEB
2.8 V
2.7 V
LP8900TLE-AAEC
2.8 V
1.2 V
6 Pin Configuration and Functions
YZR Package
6-Pin DSBGA
Pin Functions
PIN
TYPE
DESCRIPTION
NUMBER
NAME
A1
EN1
I
Enable input; enables the regulator when
≥ 1.2 V. Enable Input has an internal 3-MΩ
pulldown resistor to GND.
Disables the regulator when
≤ 0.4 V.
A2
OUT1
O
Voltage output. A low ESR ceramic capacitor must be connected from this pin to GND.
(See Application and Implementation.) Connect this output to the load circuit.
B1
GND
G
Common ground.
B2
IN
I
Voltage supply input. A 1-µF capacitor must be connected from this pin to GND.
C1
EN2
I
Enable input; enables the regulator when
≥ 1.2 V. Enable input has an internal 3-MΩ
pulldown resistor to GND.
Disables the regulator when
≤ 0.4 V.
C2
OUT2
O
Voltage output. A low ESR ceramic capacitor must be connected from this pin to GND.
(See Application and Implementation.) Connect this output to the load circuit.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23


Fiches technique Télécharger

Go To PDF Page


Lien URL



ALLDATASHEET vous a-t-il été utile ?  [ DONATE ] 

À propos de Alldatasheet   |   Publicité   |   Contactez-nous   |   Politique de confidentialité   |   Lien vers la fiche technique    |   Echange de liens   |   Fabricants
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com