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Moteur de recherche de fiches techniques de composants électroniques |
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Moteur de recherche de fiches techniques de composants électroniques |
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CS5530 Fiches technique(PDF) 225 Page - National Semiconductor (TI) |
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CS5530 Fiches technique(HTML) 225 Page - National Semiconductor (TI) |
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225 / 241 page  Revision 4.1 225 www.national.com Electrical Specifications (Continued) 5.1.1 Nand Tree Mode TheNAND treemodeisusedtotestinput andbidirec- tional pins which will be part of the NAND tree chain. The NAND tree chain starts on pin L24 (SUSP_3V) and the output of the chain is on pin K24 (POR#). Table 5-2 gives the pins of the NAND tree chain. The NAND tree mode is started by pulling pins D3 (TEST) and AD14 (IRQ7) from low to high. All inputs in Table 5-2 are initialized to a 1 and then toggled to a 0 at least 100 ns apart. The output waveform on pin K24 (POR#) is a clock (see Figure 5-1 on page 226). Table 5-2. NAND Tree Test Mode Pins Signal Name Pin No. SUSP_3V (NAND Input Start) L24 SUSPA# L25 PSERIAL L26 CLK_14MHZ P24 SMI# P25 INTR P26 IRQ13 R23 XIDE_DATA7 U23 XIDE_DATA6 U24 XIDE_DATA8 V24 XIDE_DATA10 V25 XIDE_DATA5 W26 XIDE_DATA9 Y25 XIDE_DATA11 Y24 XIDE_DATA4 AA26 XIDE_DATA12 AA25 XIDE_DATA3 AB26 XIDE_DATA1 AA24 XIDE_DATA13 AB25 XIDE_DATA2 AB24 XIDE_DATA0 AC26 XIDE_DATA14 AC25 XIDE_DATA15 AB23 IDE_DREQ1 AC24 IDE_DREQ0 AD26 IDE_IORDY0 AD25 IDE_IORDY1 AE26 SA14/SD14 AD24 SA15/SD15 AE25 GPIO0 AC22 GPIO1/SDATA_IN2 AE24 GPIO2 AF25 GPIO3 AF24 GPIO4/SA20 AD22 GPIO5/SA21 AC21 GPIO6/SA22 AE23 GPIO7/SA23 AF23 SA13/SD13 AE22 SA10/SD10 AC20 DRQ7 AF22 SA12/SD12 AE21 SA11/SD11 AF21 SA9/SD9 AD19 DRQ6 AE20 MEMW# AF20 MEMR# AE19 DRQ5 AD18 SA8/SD8 AF19 DRQ0 AE18 IRQ11 AF18 IRQ14 AC17 IRQ15 AD17 SBHE# AE17 IRQ12 AF17 IRQ10 AE16 IOCS16# AF16 MEMCS16# AC15 IRQ4 AE15 TC AF15 IRQ3 AC14 IRQ8# AE14 IRQ6 AF14 DRQ3 AD13 IRQ5 AE13 IRQ1 AF13 DRQ1 AD12 IORX0 AE12 SA17 AF12 IOW# AC11 SA16 AD11 SA18 AE11 IOCHRDY AF11 SA19 AD10 DRQ2 AE10 ZEROWS# AF10 SA2/SD2 AD9 SA0/SD0 AE9 SA4/SD4 AF6 SA1/SD1 AE6 SA6/SD6 AF5 SA3/SD3 AC6 IRQ9 AE5 SA5/SD5 AD5 SA7/SD7 AF4 CLK_32K AE3 OVER_CUR# W3 POWER_EN V4 USBCLK W1 BIT_CLK V2 SDATA_IN U4 DDC_SDA M4 FP_DATA12/SA12 L1 FP_DATA0/SA0 K3 FP_DATA13/SA13 K2 Signal Name Pin No. FP_DATA14/SA14 K1 FP_DATA2/SA2 J3 FP_DATA1/SA1 J2 FP_DATA3/SA3 J1 FP_DATA15/SA15 H2 FP_DATA16/SA_OE# H3 FP_DATA4//SA4 H1 FP_DATA8//SA8 G1 FP_DATA5/SA5 G2 FP_DATA7//SA7 G3 FP_DATA6/SA6 G4 FP_DATA9//SA9 F1 FP_DATA17/MASTER# F3 FP_DATA10//SA10 E2 FP_DATA11/SA11 D1 FP_VSYNC C1 FP_HSYNC C2 ENA_DISP B1 TVCLK B2 PIXEL0 A1 PIXEL3 C4 PIXEL6 D5 PIXEL4 B3 PIXEL1 A2 PIXEL2 A3 PIXEL11 C5 PIXEL9 D6 PIXEL5 B4 PIXEL7 A4 HSYNC C6 VSYNC B5 PIXEL13 D7 PIXEL14 C7 PIXEL10 A5 PIXEL8 B6 VID_CLK A6 PIXEL17 C8 VID_VAL B7 PIXEL12 A7 PIXEL15 B8 PIXEL20 D9 PIXEL21 C9 PIXEL16 A8 PIXEL18 B9 PIXEL19 A9 PIXEL23 C10 VID_DATA4 D11 Signal Name Pin No. |
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