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10F202 Fiches technique(PDF) 47 Page - Microchip Technology |
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10F202 Fiches technique(HTML) 47 Page - Microchip Technology |
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47 / 88 page ![]() 2004-2014 Microchip Technology Inc. DS40001239F-page 47 PIC10F200/202/204/206 ADDWF Add W and f Syntax: [ label ] ADDWF f,d Operands: 0 f 31 d 01 Operation: (W) + (f) (dest) Status Affected: C, DC, Z Description: Add the contents of the W register and register ‘f’. If ‘d’ is ‘0’, the result is stored in the W register. If ‘d’ is ‘1’, the result is stored back in register ‘f’. ANDLW AND literal with W Syntax: [ label ] ANDLW k Operands: 0 k 255 Operation: (W).AND. (k) (W) Status Affected: Z Description: The contents of the W register are AND’ed with the 8-bit literal ‘k’. The result is placed in the W register. ANDWF AND W with f Syntax: [ label ] ANDWF f,d Operands: 0 f 31 d [0,1] Operation: (W) .AND. (f) (dest) Status Affected: Z Description: The contents of the W register are AND’ed with register ‘f’. If ‘d’ is ‘0’, the result is stored in the W register. If ‘d’ is ‘1’, the result is stored back in register ‘f’. BCF Bit Clear f Syntax: [ label ] BCF f,b Operands: 0 f 31 0 b 7 Operation: 0 (f<b>) Status Affected: None Description: Bit ‘b’ in register ‘f’ is cleared. BSF Bit Set f Syntax: [ label ] BSF f,b Operands: 0 f 31 0 b 7 Operation: 1 (f<b>) Status Affected: None Description: Bit ‘b’ in register ‘f’ is set. BTFSC Bit Test f, Skip if Clear Syntax: [ label ] BTFSC f,b Operands: 0 f 31 0 b 7 Operation: skip if (f<b>) = 0 Status Affected: None Description: If bit ‘b’ in register ‘f’ is ‘0’, then the next instruction is skipped. If bit ‘b’ is ‘0’, then the next instruction fetched during the current instruction execution is discarded, and a NOP is executed instead, making this a 2-cycle instruction. |
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