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ICS1889 Fiches technique(PDF) 15 Page - Integrated Circuit Systems

No de pièce ICS1889
Description  100Base-FX Integrated PHYceiverTM
PDF  35 Pages
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Fabricant  ICST [Integrated Circuit Systems]
Site Internet  http://www.icst.com
Logo ICST - Integrated Circuit Systems

ICS1889 Fiches technique(HTML) 15 Page - Integrated Circuit Systems

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ICS1889
Enable Far End Fault (bit 4)
If this bit is set to a logic one, the far end fault logic becomes
active resulting in faults being signaled and recognized via the
“in-band” signaling scheme. If this bit is set to a logic zero,
the far end fault logic is disabled.
Transmit Far End Fault (bit 3)
Management may indicate a fault has occurred to its link
partner by setting this bit to a logic one. Indicating a fault
brings the link down and disables the reception of data until
this bit is cleared and the link is reestablished.
Invalid Error Code Test (bit 2)
If this bit is set to a logic one, the 4B5B encoder operates as a
5B5B encoder obtaining the fifth bit of the code group from
the value of TXER.
Reserved (bit 1)
This bit is reserved for ICS use. It must always be written with
a logic zero. A read always returns a logic zero.
Reserved (bit 0)
This bit is reserved for ICS use. It must always be written with
a logic zero. A read always returns a logic zero.



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