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WM8960 Fiches technique(PDF) 70 Page - Wolfson Microelectronics plc |
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WM8960 Fiches technique(HTML) 70 Page - Wolfson Microelectronics plc |
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70 / 92 page ![]() WM8960 Production Data w PD, August 2013, Rev 4.2 70 REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION REFER TO 0 ADCHPD 0 ADC High Pass Filter Disable 0 = Enable high pass filter on left and right channels 1 = Disable high pass filter on left and right channels Analogue to Digital Converter R6 (06h) ADC and DAC Control (2) 8:7 00 Reserved 6:5 DACPOL[1:0] 00 DAC polarity control: 00 = Polarity not inverted 01 = DAC L inverted 10 = DAC R inverted 11 = DAC L and R inverted Output Signal Path 4 0 Reserved 3 DACSMM 0 DAC Soft Mute Mode 0 = Disabling soft-mute (DACMU=0) will cause the volume to change immediately to the LDACVOL / RDACVOL settings 1 = Disabling soft-mute (DACMU=0) will cause the volume to ramp up gradually to the LDACVOL / RDACVOL settings Output Signal Path 2 DACMR 0 DAC Soft Mute Ramp Rate 0 = Fast ramp (24kHz at fs=48k, providing maximum delay of 10.7ms) 1 = Slow ramp (1.5kHz at fs=48k, providing maximum delay of 171ms) Output Signal Path 1 DACSLOPE 0 Selects DAC filter characteristics 0 = Normal mode 1 = Sloping stopband Output Signal Path 0 0 Reserved R7 (07h) Audio Interface 8 ALRSWAP 0 Left/Right ADC Channel Swap 1 = Swap left and right ADC data in audio interface 0 = Output left and right data as normal Audio Interface Control 7 BCLKINV 0 BCLK invert bit (for master and slave modes) 0 = BCLK not inverted 1 = BCLK inverted Audio Interface Control 6 MS 0 Master / Slave Mode Control 0 = Enable slave mode 1 = Enable master mode Audio Interface Control 5 DLRSWAP 0 Left/Right DAC Channel Swap 0 = Output left and right data as normal 1 = Swap left and right DAC data in audio interface Audio Interface Control 4 LRP 0 Right, left and I 2S modes – LRCLK polarity 0 = normal LRCLK polarity 1 = invert LRCLK polarity Audio Interface Control DSP Mode – mode A/B select 0 = MSB is available on 2nd BCLK rising edge after LRC rising edge (mode A) 1 = MSB is available on 1st BCLK rising edge after LRC rising edge (mode B) 3:2 WL[1:0] 10 Audio Data Word Length 00 = 16 bits 01 = 20 bits 10 = 24 bits 11 = 32 bits (see Note) Audio Interface Control |
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