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EM73880 Fiches technique(PDF) 37 Page - ELAN Microelectronics Corp

No de pièce EM73880
Description  4-BIT MICRO-CONTROLLER FOR LCD PRODUCT
PDF  40 Pages
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Fabricant  EMC [ELAN Microelectronics Corp]
Site Internet  http://www.emc.com.tw
Logo EMC - ELAN Microelectronics Corp

EM73880 Fiches technique(HTML) 37 Page - ELAN Microelectronics Corp

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* This specification are subject to be changed without notice.
EM73880
EM73880
EM73880
EM73880
EM73880
4-BIT MICRO-CONTROLLER FOR LCD PRODUCT
4-BIT MICRO-CONTROLLER FOR LCD PRODUCT
4-BIT MICRO-CONTROLLER FOR LCD PRODUCT
4-BIT MICRO-CONTROLLER FOR LCD PRODUCT
4-BIT MICRO-CONTROLLER FOR LCD PRODUCT
11.30.2001
Preliminary
Preliminary
Preliminary
Preliminary
Preliminary
INCL
0111 1110
LR
←LR + 1
1
1
-
Z
C'
INCM
0101 1111
RAM[HL]
←RAM[HL]+1
1
1
-
Z
C'
SUBA
#k
0110 1110 0111 kkkk
Acc
←k-Acc
2
2
-
Z
C
SBCAM
0111 0010
Acc
←RAM[HLl - Acc - CF'
1
1
C
Z
C
SUBM #k
0110 1110 1111 kkkk
RAM[HL]
←k - RAM[HL]
2
2
-
Z
C
(((((4) Logical operation
4) Logical operation
4) Logical operation
4) Logical operation
4) Logical operation
Mnemonic
Object code ( binary )
Mnemonic
Object code ( binary )
Mnemonic
Object code ( binary )
Mnemonic
Object code ( binary )
Mnemonic
Object code ( binary )
Operation description
Operation description
Operation description
Operation description
Operation description
Byte
Byte
Byte
Byte
Byte
Cycle
Cycle
Cycle
Cycle
Cycle
Flag
Flag
Flag
Flag
Flag
C
C
C
C
C
Z
Z
Z
Z
Z
S
S
S
S
S
ANDA #k
0110 1110 0110 kkkk
Acc
←Acc&k
2
2
-
Z
Z'
ANDAM
0111 1011
Acc
←Acc & RAM[HL]
1
1
-
Z
Z'
ANDM #k
0110 1110 1110 kkkk
RAM[HL]
←RAM[HL]&k
2
2
-
Z
Z'
ORA
#k
0110 1110 0100 kkkk
Acc
←Acc k
2
2
-
Z
Z'
ORAM
0111 1000
Acc
←Acc RAM[HL]
1
1
-
Z
Z'
ORM
#k
0110 1110 1100 kkkk
RAM[HL]
←RAM[HL] k
2
2
-
Z
Z'
XORAM
0111 1001
Acc
←Acc^RAM[HL]
1
1
-
Z
Z'
(5) Exchange
(5) Exchange
(5) Exchange
(5) Exchange
(5) Exchange
Mnemonic
Object code ( binary )
Mnemonic
Object code ( binary )
Mnemonic
Object code ( binary )
Mnemonic
Object code ( binary )
Mnemonic
Object code ( binary )
Operation description
Operation description
Operation description
Operation description
Operation description
Byte
Byte
Byte
Byte
Byte
Cycle
Cycle
Cycle
Cycle
Cycle
Flag
Flag
Flag
Flag
Flag
C
C
C
C
C
Z
Z
Z
Z
Z
S
S
S
S
S
EXA
x
0110 1000 xxxx xxxx
Acc
↔RAM[x]
2
2
-
Z
1
EXAH
0110 0110
Acc
↔HR
1
2
-
Z
1
EXAL
0110 0100
Acc
↔LR
1
2
-
Z
1
EXAM
0101 1000
Acc
↔RAM[HL]
1
1
-
Z
1
EXHL x
0100 1100 xxxx xx00
LR
↔RAM[x],
HR
↔RAM[x+1]
2
2
-
-
1
(6) Branch
(6) Branch
(6) Branch
(6) Branch
(6) Branch
Mnemonic
Object code ( binary )
Mnemonic
Object code ( binary )
Mnemonic
Object code ( binary )
Mnemonic
Object code ( binary )
Mnemonic
Object code ( binary )
Operation description
Operation description
Operation description
Operation description
Operation description
Byte
Byte
Byte
Byte
Byte
Cycle
Cycle
Cycle
Cycle
Cycle
Flag
Flag
Flag
Flag
Flag
C
C
C
C
C
Z
Z
Z
Z
Z
S
S
S
S
S
SBR a
00aa aaaa
If SF=1 then PC
←PC
11-6.a5-0
11
-
-
1
else null
LBR a
1100 aaaa aaaa aaaa
If SF= 1 then PC
←a else null
2
2
-
-
1
(7) Compare
(7) Compare
(7) Compare
(7) Compare
(7) Compare
Mnemonic
Object code ( binary )
Mnemonic
Object code ( binary )
Mnemonic
Object code ( binary )
Mnemonic
Object code ( binary )
Mnemonic
Object code ( binary )
Operation description
Operation description
Operation description
Operation description
Operation description
Byte
Byte
Byte
Byte
Byte
Cycle
Cycle
Cycle
Cycle
Cycle
Flag
Flag
Flag
Flag
Flag
C
C
C
C
C
Z
Z
Z
Z
Z
S
S
S
S
S
CMP
#k,y 0100 1011 kkkk yyyy
k-RAM[y]
2
2
C
Z
Z'
CMPA x
0110 1011 xxxx xxxx
RAM[x]-Acc
2
2
C
Z
Z'
CMPAM
0111 0011
RAM[HL] - Acc
1
1
C
Z
Z'
CMPH #k
0110 1110 1011 kkkk
k - HR
2
2
-
Z
C
CMPIA #k
1011 kkkk
k - Acc
1
1
C
Z
Z'
CMPL #k
0110 1110 0011 kkkk
k-LR
2
2
-
Z
C



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