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AS8525 Fiches technique(PDF) 30 Page - ams AG

No de pièce AS8525
Description  LIN Transceiver with Voltage Regulators, Programmable Gain High Side Amplifier, and Voltage Attenuator
PDF  38 Pages
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Fabricant  AMSCO [ams AG]
Site Internet  http://www.ams.com
Logo AMSCO - ams AG

AS8525 Fiches technique(HTML) 30 Page - ams AG

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Revision 2.3
29 - 37
AS8525
Datasheet - Application In form atio n
Figure 16. Protocol for Serial Data Write with Length = 1
Figure 17. Protocol for Serial Data Write with Length = 4
8.8.3 Read Command
For Read command C0=1.
After the command code C0 and two reserved bits, the address of register to be read has to be provided from the MSB to the LSB. Then one or
more data bytes can be transferred from the SPI slave to the master, always from the MSB to the LSB. To transfer more bytes from consecutive
addresses, SPI master has to keep active the SPI CS signal and the SPI clock as long as it desires to read data from the slave. Each bit of the
command and address sections of the frame have to be driven by the SPI master on the SPI clock transfer edge and the SPI slave on the next
SPI clock edge samples it. Each bit of the data section of the frame has to be driven by the SPI slave on the SPI clock transfer edge and the SPI
master on the next SPI clock edge samples it. These edges are selected as per clock polarity settings. In the following figures, two examples of
read command (without and with address self-increment) have been shown.
CS
SCLK
SDI
SDO
0
RES1 RES0
A4
A0
A1
A2
A3
D0
D1
D2
D3
D4
D5
D7
D6
Transfer edge
Sampling edge
Data D7 – D0 is moved
to Address A4..A0 here
CS
SCLK
SDI
SDO
0
R
E
S
1
A
1
A
4
A
2
A
3
D
0
D
1
D
2
D
3
D
4
D
5
D
7
D
6
Data D7-D0 is
moved to Address
A4-A0 here
Data D7-D0 is
moved to Address
A4-A0 +1 here
Data D7-D0 is
moved to Address
A4-A0 +2 here
Data D7-D0 is
moved to Address
A4-A0 +3 here
Data D7-D0 is
moved to Address
A4-A0 +4 here
A
0
R
E
S
0
D
1
D
2
D
3
D
4
D
5
D
7
D
6
D
0
D
1
D
2
D
3
D
4
D
5
D
7
D
6
D
0
D
1
D
2
D
3
D
4
D
5
D
7
D
6
D
0
D
1
D
2
D
3
D
4
D
5
D
7
D
6
D
0



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