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AM79C989JC Fiches technique(PDF) 34 Page - Advanced Micro Devices |
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AM79C989JC Fiches technique(HTML) 34 Page - Advanced Micro Devices |
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34 / 37 page ![]() 34 Am79C989 PRELIMINARY Fast Link Pulse Timing Figure 4. Fast Link Pulse Timing Diagram Clock Pulses FLP Burst FLP Link Pulse Timing D0 = 1 Clock Pulse Data Pulse Clock Pulse D1 = 0 D2 = 1 D3 = 1 D15 = 0 22 20 20 20 21 21173B-8 No. Symbol Parameter Description Min Max Unit 20 tFLP0 Link Pulse Width. 80 120 ns 21 tFLP1 Clock to Data Delay. 55.5 69.5 µs 22 tFLP2 Clock to Clock Delay. 111 139 µs 23 Total Pulses in FLP Burst. 17 33 No. 24 FLP Burst to FLP Burst. 8 24 ms |
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