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MPC8280EC Fiches technique(PDF) 15 Page - Freescale Semiconductor, Inc |
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MPC8280EC Fiches technique(HTML) 15 Page - Freescale Semiconductor, Inc |
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15 / 83 page ![]() MPC8280 PowerQUICC II Family Hardware Specifications, Rev. 2 Freescale Semiconductor 15 Power Dissipation 5 Power Dissipation This table provides preliminary, estimated power dissipation for various configurations. Note that suitable thermal management is required to ensure the junction temperature does not exceed the maximum specified value. Also note that the I/O power should be included when determining whether to use a heat sink. For a complete list of possible clock configurations, see Section 7, “Clock Configuration Modes.” Table 7. Estimated Power Dissipation for Various Configurations1 1 Test temperature = 105° C Bus (MHz) CPM Multiplication Factor CPM (MHz) CPU Multiplication Factor CPU (MHz) PINT(W) 2,3 2 P INT = IDD x VDD Watts 3 Values do not include I/O. Add the following estimates for active I/O based on the following bus speeds: 66.7 MHz = 0.45 W (nominal), 0.5 W (maximum) 83.3 MHz = 0.5W (nominal), 0.6 W (maximum) 100 MHz = 0.6 W (nominal), 0.7 W (maximum) Vddl 1.5 Volts Nominal Maximum 66.67 2.5 166 3.5 233 0.95 1.0 66.67 2.5 166 4 266 1.0 1.05 66.67 3 200 4 266 1.05 1.1 66.67 3.5 233 4.5 300 1.05 1.15 83.33 3 250 4 333 1.25 1.35 83.33 3 250 4.5 375 1.3 1.4 83.33 3.5 292 5 417 1.45 1.55 100 3 300 4 400 1.5 1.6 100 3 300 4.5 450 1.55 1.65 |
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