MPC5645B datasheet(89/114 Pages) FREESCALE

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MPC5646C Microcontroller Data Sheet, Rev. 3

Preliminary—Subject to Change Without Notice

Freescale Semiconductor

Data Setup Time for Inputs

Master (MTFE = 0)

Slave

Master (MTFE = 1, CPHA = 0)5

Master (MTFE = 1, CPHA = 1)

tSUI

—

Data Hold Time for Inputs

Master (MTFE = 0)

Slave

Master (MTFE = 1, CPHA = 0)5

Master (MTFE = 1, CPHA = 1)

tHI

—

Data Valid (after SCK edge)

Master (MTFE = 0)

Slave

Master (MTFE = 1, CPHA = 0)

Master (MTFE = 1, CPHA = 1)

tSUO

—

Data Hold Time for Outputs

Master (MTFE = 0)

Slave

Master (MTFE = 1, CPHA = 0)

Master (MTFE = 1, CPHA = 1)

tHO

9.5

—

1 This value of this parameter is dependent upon the external device delays and the other parameters mentioned in

this table.

2 The maximum value is programmable in DSPI_CTARn [PSSCK] and DSPI_CTARn [CSSCK]. For JPC5604B, the

spec value of tCSC will be attained only if TDSPI x PSSCK x CSSCK > tCSC .

3 The maximum value is programmable in DSPI_CTARn [PASC] and DSPI_CTARn [ASC]. For JPC5604B, the spec

value of tASC will be attained only if TDSPI x PASC x ASC > tASC.

4 The parameter value is obtained from t

SUSS and tSUO for slave.

5 This number is calculated assuming the SMPL_PT bitfield in DSPI_MCR is set to 0b00.

For DSPI1, the Data Hold Time for Outputs in Master (MTFE = 0) is

2 ns.

For DSPI1, the Data Hold Time for Outputs in Master (MTFE = 1, CPHA = 0) is

2 n.

For DSPI1, the Data Hold Time for Outputs in Master (MTFE = 1, CPHA = 1) is

2 ns.

Table 49. DSPI timing (continued)

Spec

Characteristic

Symbol

Unit

Min

Max

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