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PCA2000UAC Fiches technique(PDF) 4 Page - NXP Semiconductors

No de pièce PCA2000UAC
Description  32 kHz watch circuit with programmable adaptive motor pulse
PDF  30 Pages
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Fabricant  NXP [NXP Semiconductors]
Site Internet  http://www.nxp.com
Logo NXP - NXP Semiconductors

PCA2000UAC Fiches technique(HTML) 4 Page - NXP Semiconductors

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PCA2000_2001
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 08 — 23 August 2010
4 of 30
NXP Semiconductors
PCA2000; PCA2001
32 kHz watch circuit with programmable adaptive motor pulse
6.2 Pin description
7.
Functional description
7.1 Motor pulse
The motor output supplies pulses of different driving stages, depending on the torque
required to turn on the motor. The number of different stages can be selected between
three and six. With the exception of the highest driving stage, each motor pulse (tp in
Figure 3 and Figure 6) is followed by a detection phase during which the motor movement
is monitored, in order to check whether the motor has turned correctly or not.
If a missing step is detected, a correction sequence is generated (see Figure 3) and the
driving stage is switched to the next level. The correction sequence consists of two
pulses: first a short pulse in the opposite direction (0.98 ms, modulated with the maximum
duty cycle) to give the motor a defined position, followed by a motor pulse of the strongest
driving level. Every 4 minutes, the driving level is lowered again by one stage.
The motor pulse has a constant pulse width. The driving level is regulated by chopping the
driving pulse with a variable duty cycle. The driving level starts from the programmed
minimum value and increases by 6.25 % after each failed motor step. The strongest
driving stage, which is not followed by a detection phase, is programmed separately.
Table 2.
Pin description
Symbol
Pin
Description
VSS
1
ground
i.c.
2
internally connected
OSCIN
3
oscillator input
OSCOUT
4
oscillator output
VDD
5
supply voltage
MOT1
6
motor 1 output
MOT2
7
motor 2 output
RESET
8
reset input
Fig 3.
Correction sequence after failed motor step
31.25 ms
1.96 ms
detection phase
tp
31.25 ms
0.98 ms
tp
2tp
mgw350



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