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P89LPC9331FDH Fiches technique(PDF) 9 Page - NXP Semiconductors |
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P89LPC9331FDH Fiches technique(HTML) 9 Page - NXP Semiconductors |
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9 / 93 page ![]() P89LPC9331_9341_9351_9361_3 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 03 — 2 June 2009 9 of 93 NXP Semiconductors P89LPC9331/9341/9351/9361 8-bit microcontroller with accelerated two-clock 80C51 core P0.6/CMP1/KBI6 20 I/O P0.6 — Port 0 bit 6. High current source. O CMP1 — Comparator 1 output. I KBI6 — Keyboard input 6. P0.7/T1/KBI7 19 I/O P0.7 — Port 0 bit 7. High current source. I/O T1 — Timer/counter 1 external count input or overflow output. I KBI7 — Keyboard input 7. P1.0 to P1.7 I/O, I [1] Port 1: Port 1 is an 8-bit I/O port with a user-configurable output type, except for three pins as noted below. During reset Port 1 latches are configured in the input only mode with the internal pull-up disabled. The operation of the configurable Port 1 pins as inputs and outputs depends upon the port configuration selected. Each of the configurable port pins are programmed independently. Refer to Section 7.16.1 “Port configurations” and Table 12 “Static characteristics” for details. P1.2 to P1.3 are open drain when used as outputs. P1.5 is input only. All pins have Schmitt trigger inputs. Port 1 also provides various special functions as described below: P1.0/TXD 18 I/O P1.0 — Port 1 bit 0. O TXD — Transmitter output for serial port. P1.1/RXD 17 I/O P1.1 — Port 1 bit 1. I RXD — Receiver input for serial port. P1.2/T0/SCL 12 I/O P1.2 — Port 1 bit 2 (open-drain when used as output). I/O T0 — Timer/counter 0 external count input or overflow output (open-drain when used as output). I/O SCL — I2C-bus serial clock input/output. P1.3/INT0/SDA 11 I/O P1.3 — Port 1 bit 3 (open-drain when used as output). I INT0 — External interrupt 0 input. I/O SDA — I2C-bus serial data input/output. P1.4/INT1 10 I/O P1.4 — Port 1 bit 4. High current source. I INT1 — External interrupt 1 input. P1.5/RST 6 I P1.5 — Port 1 bit 5 (input only). I RST — External Reset input during power-on or if selected via UCFG1. When functioning as a reset input, a LOW on this pin resets the microcontroller, causing I/O ports and peripherals to take on their default states, and the processor begins execution at address 0. Also used during a power-on sequence to force ISP mode. P1.6/OCB 5 I/O P1.6 — Port 1 bit 6. High current source. O OCB — Output Compare B. (P89LPC9351/9361) P1.7/OCC/AD00 4 I/O P1.7 — Port 1 bit 7. High current source. O OCC — Output Compare C. (P89LPC9351/9361) I AD00 — ADC0 channel 0 analog input. Table 3. Pin description …continued Symbol Pin Type Description PLCC28, TSSOP28 |
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