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ATmega16HVB Fiches technique(PDF) 30 Page - ATMEL Corporation |
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ATmega16HVB Fiches technique(HTML) 30 Page - ATMEL Corporation |
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30 / 273 page ![]() 30 8042A–AVR–07/09 ATmega16HVB/32HVB Figure 9-2. Oscillator Sampling Interface Block Diagram The osi_posedge signal pulses on each rising edge of the prescaled clock. This signal is not directly accessible by the CPU, but can be used to trigger the input capture function of Timer/Counter0. Using OSI in combination with the input capture function of Timer/Counter0 facilitates accurate measurement of the oscillator frequencies with a minimum of CPU calcula- tion. Refer to ”Timer/Counter (T/C0,T/C1)” on page 82 for details on how to enable the Input Capture function. osi_posedge Databus Ultra Low Power RC Oscillator Slow RC Oscillator 7 bit prescaler Edge Detector OSISEL0 OSICSR Fast RC Oscillator |
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