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ST7263BHx Fiches technique(PDF) 63 Page - STMicroelectronics

No de pièce ST7263BHx
Description  Low speed USB 8-bit MCU family with up to 32 KB Flash/ROM, DFU capability, 8-bit ADC, WDG, timer, SCI and I²C
PDF  186 Pages
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Fabricant  STMICROELECTRONICS [STMicroelectronics]
Site Internet  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

ST7263BHx Fiches technique(HTML) 63 Page - STMicroelectronics

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ST7263Bxx
On-chip peripherals
Doc ID 7516 Rev 8
63/186
Input Capture
In this section, the index, i, may be 1 or 2 because there are two input capture functions in
the 16-bit timer.
The two 16-bit input capture registers (IC1R and IC2R) are used to latch the value of the
free running counter after a transition is detected on the ICAPi pin (see Figure 32).
ICiR register is a read-only register.
The active transition is software programmable through the IEDGi bit of Control registers
(CRi).
Timing resolution is one count of the free running counter: (fCPU/CC[1:0]).
Procedure
To use the input capture function select the following in the CR2 register:
1.
Select the timer clock (CC[1:0]) (see Table 24).
2.
Select the edge of the active transition on the ICAP2 pin with the IEDG2 bit (the ICAP2
pin must be configured as floating input or input with pull-up without interrupt if this
configuration is available).
3.
Select the following in the CR1 register:
a)
Set the ICIE bit to generate an interrupt after an input capture coming from either
the ICAP1 pin or the ICAP2 pin
b)
Select the edge of the active transition on the ICAP1 pin with the IEDG1 bit (the
ICAP1pin must be configured as floating input or input with pull-up without
interrupt if this configuration is available).
When an input capture occurs:
ICFi bit is set.
The ICiR register contains the value of the free running counter on the active transition
on the ICAPi pin (see Figure 33).
A timer interrupt is generated if the ICIE bit is set and the I bit is cleared in the CC
register. Otherwise, the interrupt remains pending until both conditions become true.
Clearing the input Capture interrupt request (that is, clearing the ICFi bit) is done in two
steps:
1.
Reading the SR register while the ICFi bit is set.
2.
An access (read or write) to the ICiLR register.
Table 19.
IC/R register
MS Byte
LS Byte
ICiR
ICiHR
ICiLR



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