TMC2192 datasheet(51/69 Pages) CADEKA

51 / 69 page

PRODUCT SPECIFICATION

TMC2192

REV. 1.0.0 8/13/03

Control Register Deﬁnitions (continued)

Timing Register (0x29)

76543210

Reg

Bit

Name

Description

7-0

Equalization Pulse High Duration.

This 8 bit register holds 8 LSB’s of EH, The addition of 256 or 512 is

controlled by T512. The range is either 256 to 511 PCK cycles or 512 to

767 PCK cycles.

Timing Register (0x2A)

76543210

Reg

Bit

Name

Description

7-0

Vertical Sync Pulse Low Duration.

This 8 bit register holds 8 LSB’s of SL, The addition of 256 or 512 is

controlled by T512. The range is either 256 to 511 PCK cycles or 512 to

767 PCK cycles.

Timing Register (0x2B)

76543210

Reg

Bit

Name

Description

7-0

Vertical Sync Pulse High Duration.

This 8 bit register holds a value extending from 0 to 255 PCK cycles.

Timing Register (0x2C)

76543210

Reg

Bit

Name

Description

7-0

Front Porch Duration.

This 8 bit register holds a value extending from 0 to 255 PCK cycles.

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