CS42324 datasheet(48/71 Pages) CIRRUS

48 / 71 page

DS721A6

CS42324

6.3.2

INT Pin High/Low Active (INT_H/L)

When this bit is set, the INT pin will function as an active high CMOS driver. When this bit is cleared, the

INT pin will function as an active low open drain driver and will require an external pull-up resistor for prop-

er operation.

6.3.3

Freeze

This function allows modifications to be made to certain bits without the changes taking effect until the

Freeze bit is disabled. To make multiple changes to these bits take effect simultaneously, set the Freeze

bit, make all changes, then clear the Freeze bit. The bits affected by the Freeze function are listed in

Table 10.

6.3.4

Tri-State SDOUT

When this bit is set, SDOUT will be placed in a high-impedance state.

6.3.5

Tri-State Serial Port 1

When enabled, and the device is configured as a master, then SCLK1 and LRCK1 of Serial Port 1 (SP1)

will be placed in a high-impedance output state. If Serial Port 1 is configured as a slave, SCLK1 and

LRCK1 will remain as inputs.

INT_H/L

INT Pin Polarity

Active low, open drain driver

Active high, CMOS driver

FREEZE

FREEZE Status

Changes to registers take effect immediately

Changes to registers are held until FREEZE is released

Name

Bit(s)

Mute Control

01h

7:0

ADC Ch A Vol. Control

0Fh

7:0

ADC Ch B Vol. Control

10h

7:0

DAC1 Ch A Vol. Control

11h

7:0

DAC1 Ch B Vol. Control

12h

7:0

DAC2 Ch A Vol. Control

13h

7:0

DAC2 Ch B Vol. Control

14h

7:0

Table 10. Freeze-able Bits

TRI-SDOUT

SDOUT state

Output

High-impedance

TRI-SP1

SCLK1 and LRCK1 State

SCLK1 and LRCK1 operate as inputs if Serial Port 1 is configured as a slave; SCLK1 and LRCK1

operate as outputs if Serial Port 1 is configured as a master

SCLK1 and LRCK1 operate as inputs if Serial Port 1 is configured as a slave; SCLK1 and LRCK1

become high-impedance outputs if Serial Port 1 is configured as a master

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