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HD6432351 Fiches technique(PDF) 274 Page - Renesas Technology Corp

No de pièce HD6432351
Description  16-Bit Single-Chip Microcomputer
PDF  1025 Pages
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Fabricant  RENESAS [Renesas Technology Corp]
Site Internet  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

HD6432351 Fiches technique(HTML) 274 Page - Renesas Technology Corp

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Section 7 DMA Controller (DMAC)
Rev. 3.00 Sep 15, 2006 page 240 of 988
REJ09B0330-0300
Figure 7.5 illustrates operation in idle mode.
Transfer
IOAR
1 byte or word transfer performed in
response to 1 transfer request
MAR
Figure 7.5 Operation in Idle Mode
The number of transfers is specified as 16 bits in ETCR. ETCR is decremented by 1 each time a
transfer is executed, and when its value reaches H'0000, the DTE bit is cleared and transfer ends.
If the DTIE bit is set to 1 at this time, an interrupt request is sent to the CPU or DTC.
The maximum number of transfers, when H'0000 is set in ETCR, is 65,536.
Transfer requests (activation sources) consist of A/D converter conversion end interrupts, external
requests, SCI transmission complete and reception complete interrupts, and TPU channel 0 to 5
compare match/input capture A interrupts. External requests can be set for channel B only.
When the DMAC is used in single address mode, only channel B can be set.



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