HD6432351 datasheet(89/1025 Pages) RENESAS

No de pièce	HD6432351

Description	16-Bit Single-Chip Microcomputer

PDF	1025 Pages

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Fabricant	RENESAS [Renesas Technology Corp]

Site Internet	http://www.renesas.com

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Section 2 CPU

Rev. 3.00 Sep 15, 2006 page 55 of 988

REJ09B0330-0300

Note that the first part of the address range is also the exception vector area. For further details,

refer to section 4, Exception Handling.

(a) Normal Mode

(b) Advanced Mode

Branch address

Specified

by @aa:8

Specified

by @aa:8

Reserved

Branch address

Figure 2.13 Branch Address Specification in Memory Indirect Mode

If an odd address is specified in word or longword memory access, or as a branch address, the

least significant bit is regarded as 0, causing data to be accessed or instruction code to be fetched

at the address preceding the specified address. (For further information, see section 2.5.2, Memory

Data Formats.)

2.7.2

Effective Address Calculation

Table 2.6 indicates how effective addresses are calculated in each addressing mode. In normal

mode the upper 8 bits of the effective address are ignored in order to generate a 16-bit address.

HD6432351 Fiches technique(PDF) 89 Page - Renesas Technology Corp