HD6432351 datasheet(9/1025 Pages) RENESAS

9 / 1025 page

Rev. 3.00 Sep 15, 2006 page ix of xxxiv

Item

Page

Revision (See Manual for Details)

7.7 Usage Notes

Figure 7.40 DMAC

Figure 7.41 Contention

between DMAC

CPU Read

285, 286 DMAC Register Access during Operation

Description and figures 7.40 and 7.41 added

9.3.3 Pin Functions

Table 9.5 Port 2 Pin

Functions

346

P24/PO4/TIOCA4

TMRI1 input deleted from table 9.5

9.11.3 Pin Functions

390

Description amended

Modes 1, 4, and 5 [H8S/2350]; Modes 1, 2, 4 to 6 [H8S/2351]:

…

Figure 12.4 Usage

Notes

Figure 10.56

Contention between

Overflow and Counter

Clearing

502

Figure 10.56 amended

Counter

clear signal

TCNT input

clock

TCNT

TGF

Disabled

TCFV

H'FFFF

H'0000

12.3.1 Watchdog Timer

Operation

Figure 12.4 Watchdog

Timer Operation

540

Figure 12.4 amended

TCNT count

H'00

Time

H'FF

WT/

IT = 1

TME = 1

H'00 written

to TCNT

WT/

IT = 1

TME = 1

H'00 written

to TCNT

Overflow

WDTOVF and

internal reset are

generated

WOVF = 1

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