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HD6432351 Fiches technique(PDF) 343 Page - Renesas Technology Corp

No de pièce HD6432351
Description  16-Bit Single-Chip Microcomputer
PDF  1025 Pages
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Fabricant  RENESAS [Renesas Technology Corp]
Site Internet  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

HD6432351 Fiches technique(HTML) 343 Page - Renesas Technology Corp

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Section 8 Data Transfer Controller (DTC)
Rev. 3.00 Sep 15, 2006 page 309 of 988
REJ09B0330-0300
8.3.5
Normal Mode
In normal mode, one operation transfers one byte or one word of data.
From 1 to 65,536 transfers can be specified. Once the specified number of transfers have ended, a
CPU interrupt can be requested.
Table 8.5 lists the register information in normal mode and figure 8.6 shows memory mapping in
normal mode.
Table 8.5
Register Information in Normal Mode
Name
Abbreviation
Function
DTC source address register
SAR
Designates source address
DTC destination address register
DAR
Designates destination address
DTC transfer count register A
CRA
Designates transfer count
DTC transfer count register B
CRB
Not used
Transfer
SAR
DAR
Figure 8.6 Memory Mapping in Normal Mode



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