HD404612FS datasheet(73/91 Pages) RENESAS

73 / 91 page

HD404618 Series

ROM Addressing Modes and the P Instruction

The MCU has four ROM addressing modes, as shown in figure 45 and described below.

Direct Addressing Mode: A program can branch to any address in the ROM memory space by executing

the JMPL, BRL, or CALL instruction. Each of these instructions replaces the 14 program counter bits

(PC

13–PC0) with 14-bit immediate data.

Current Page Addressing Mode: The MCU has 32 pages of ROM with 256 words per page. A program

can branch to any address in the current page by executing the BR instruction. This instruction replaces the

eight low-order bits of the program counter (PC

7–PC0) with eight-bit immediate data. If the BR instruction

is on a page boundary (address 256n + 255), executing that instruction transfers the PC contents to the next

physical page, as shown in figure 46. This means that the execution of the BR instruction on a page

boundary will make the program branch to the next page.

Note that the HMCS400-series cross macro-assembler has an automatic paging feature for ROM pages.

Zero-Page Addressing Mode: A program can branch to the zero-page subroutine area located at $000–

$003F by executing the CAL instruction. When the CAL instruction is executed, 6 bits of immediate data

are placed in the six low-order bits of the program counter (PC

5–PC0), and 0s are placed in the eight high-

order bits (PC

13–PC6).

Table Data Addressing Mode: A program can branch to an address determined by the contents of four-

bit immediate data, the accumulator, and the B register by executing the TBR instruction.

P Instruction: ROM data addressed in table data addressing mode can be referenced with the P instruction

as shown in figure 47. If bit 8 of the ROM data is 1, eight bits of ROM data are written to the accumulator

and the B register. If bit 9 is 1, eight bits of ROM data are written to the R1 and R2 port output registers.

If both bits 8 and 9 are 1, ROM data is written to the accumulator and the B register, and also to the R1 and

R2 port output registers at the same time.

The P instruction has no effect on the program counter.

HD404612FS Fiches technique(PDF) 73 Page - Renesas Technology Corp