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TS4601B Fiches technique(PDF) 17 Page - STMicroelectronics |
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TS4601B Fiches technique(HTML) 17 Page - STMicroelectronics |
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17 / 28 page ![]() TS4601B Application information 17/28 4 Application information 4.1 Common-mode sense The TS4601B implements a common-mode sense to correct the voltage differences that might occur between the headphone jack return and the GND of the device, thus creating parasitic noise in the headphone and/or line-out. The solution to strongly reduce and practically eliminate this noise, is to connect the headphone jack ground to the CMS of the device that is a common-mode sense pin. It will sense the difference of potential (voltage noise) between the TS4601B ground and headphone ground. Thanks to CMS frequency response (refer to Figure 46 on page 16), this noise is removed from the TS4601B outputs. Figure 1: Typical application schematics for the TS4601B illustrates this connection. 4.2 I²C bus interface In compliance with the I²C protocol, the TS4601B uses a serial bus to control the chip’s functions with two wires: Clock (SCL) and Data (SDA). The clock line and the data line are bi-directional (open-collector) with an external chip pull-up resistor (typically 10 k Ω). The maximum clock frequency in fast-mode specified by the I²C standard is 400 kHz, which TS4601B supports. In this application, the TS4601B is always the slave device and the controlling microcontroller MCU is the master device. The slave address of the TS4601B is 1100 000x (C0h). An SDZ pin is available to shut down the circuit from a master MCU. Table 7 summarizes the pin descriptions for the I²C bus interface. 4.2.1 I²C bus operation The host MCU can write into the TS4601B control register to control the TS4601B, and read from the control register to get a configuration from the TS4601B. The TS4601B is addressed by the byte consisting of the 7-bit slave address and R/W bit. There are five control registers (see Table 9) named CR0 to CR4. In read mode, all the control registers can be accessed. In write mode, only CR1 and CR2 can be addressed. Table 7. I²C bus interface pin descriptions Pin Functional description SDA Serial data pin SCL Clock input pin SDZ Master standby of the TS4601B Table 8. The first byte after the START message for addressing the device A6 A5 A4 A3 A2 A1 A0 R/W 11 000 00 X |
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