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STMPE1601 Fiches technique(PDF) 34 Page - STMicroelectronics |
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STMPE1601 Fiches technique(HTML) 34 Page - STMicroelectronics |
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34 / 61 page ![]() GPIO controller STMPE1601 34/61 10.4 Level translator feature Figure 7. Level translator feature When enabled, the GPIO 0-7 bits are internally mapped to GPIO 8-15 bits. The STMPE1601 becomes an 8-channel level translator where each of the channels may have its direction set individually. As GPIO 0-7 operates from Vcc, and GPIO 8-15 operates from Vio, this allows the 2 groups of GPIO to work as a level translator. Warning: When the level translator feature is enabled, the “Set pin”, “Clear pin” and “Set direction” bits in the corresponding registers will be ignored. However, the “Monitor pin”, “Edge detect”, “Pull-up” features are still available in the GPIOs used as level translator. GPIO 0-7 GPIO 8-15 Direction & enable |
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