STMPE1601 datasheet(28/61 Pages) STMICROELECTRONICS

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Interrupt system

STMPE1601

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INT_EN_GPIO_MASK

Interrupt enable GPIO mask register

Address:

0x16, 0x17

Type:

R/W

Reset:

0x00

Description:

The interrupt enable GPIO mask register is used to enable the interruption from a

particular GPIO interrupt source to the host. The IEG[15:0] bits are the interrupt

enable mask bits correspond to the GPIO[15:0] pins

INT_STA_GPIO

Interrupt status GPIO register

Address:

0x18, 0x19

Type:

R/W

Reset:

0x00

Description:

The interrupt status GPIO register monitors the status of the interruption from a

particular GPIO pin interrupt source to the host. Regardless whether the

INT_EN_GPIO_MASK bits are enabled or not, the INT_STA_GPIO bits are still

updated. The INT_STA_G[15:0] bits are the interrupt status bits correspond to the

GPIO[15:0] pins.

987

654

3210

INT_EN_GPIO_MASK_msb

INT_EN_GPIO_MASK _lsb

IEG15

IEG14

IEG13

IEG12

IEG11

IEG10

IEG9

IEG8

IEG7

IEG6

IEG5

IEG4

IEG3

IEG2

IEG1

IEG0

0000

[15:0] IEG[x]: interrupt enable GPIO mask (where x = 15 to 0)

Writing a ‘1’ to the IE[x] bit will enable the interruption to the host.

9876543210

INT_STA_GPIOR_msb

INT_STA_GPIOR _lsb

ISG15

ISG14

ISG13

ISG12

ISG11

ISG10

ISG9

ISG8

ISG7

ISG6

ISG5

ISG4

ISG3

ISG2

ISG1

ISG0

0000000000

[15:0] ISG[x]

Interrupt status GPIO (where x = 15 to 0)

Read:

Interrupt status of the GPIO[x].

Write:

A write to a ISG[x] bit with a value of ‘1’ will clear the interrupt and a write with a value of ‘0’ has

no effect on the ISG[x] bit.

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