ST72E121 datasheet(21/92 Pages) STMICROELECTRONICS

21 / 92 page

21/92

ST72E121 ST72T121

3.4 POWER SAVING MODES

3.4.1 Introduction

There are three Power Saving modes. Slow Mode

is selected by setting the relevant bits in the Mis-

cellaneous register. Wait and Halt modes may be

entered using the WFI and HALT instructions.

3.4.2 Slow Mode

In Slow mode, the oscillator frequency can be di-

vided by a value defined in the Miscellaneous

this lower frequency. Slow mode is used to reduce

power consumption, and enables the user to adapt

clock frequency to available supply voltage.

3.4.3 Wait Mode

Wait mode places the MCU in a low power con-

sumption mode by stopping the CPU. All peripher-

als remain active. During Wait mode, the I bit (CC

All other registers and memory remain unchanged.

The MCU will remain in Wait mode until an Inter-

rupt or Reset occurs, whereupon the Program

Counter branches to the starting address of the In-

terrupt or Reset Service Routine.

The MCU will remain in Wait mode until a Reset or

an Interrupt occurs, causing it to wake up.

Refer to Figure 16 below.

Figure 16. WAIT Flow Chart

WFI INSTRUCTION

RESET

INTERRUPT

CPU CLOCK

OSCILLATOR

PERIPH. CLOCK

I-BIT

CLEARED

OFF

Note: Before servicing an interrupt, the CC register is

pushed on the stack. The I-Bit is set during the inter-

rupt routine and cleared when the CC register is

popped.

4096 CPU CLOCK

FETCH RESET VECTOR

OR SERVICE INTERRUPT

CYCLES DELAY

CPU CLOCK

OSCILLATOR

PERIPH. CLOCK

I-BIT

SET

CPU CLOCK

OSCILLATOR

PERIPH. CLOCK

I-BIT

SET

ST72E121 Fiches technique(PDF) 21 Page - STMicroelectronics

ST72E121 Fiches technique(HTML) 21 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92

Fiches technique Télécharger

Lien URL