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ST20-C1 Fiches technique(PDF) 147 Page - STMicroelectronics |
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ST20-C1 Fiches technique(HTML) 147 Page - STMicroelectronics |
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147 / 205 page ![]() 147/205 8 Instruction Set Reference ® ssinc store sixteen and increment Code: 22 FE Description: Store the least significant 16 bits of Breg into the half word of memory addressed by Areg and increment the address by two bytes. Definition: sixteen ′[Areg] ← Breg 0..15 Areg ′← Creg Breg ′← Areg + 2 Creg ′← Breg Status Register: No effect Comments: Secondary instruction. Areg must be half-word aligned (i.e. divisible by 2). See also: lsinc lsxinc sbinc stl stnl swinc section 4.2. |
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