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PSD833F2 Fiches technique(PDF) 75 Page - STMicroelectronics

No de pièce PSD833F2
Description  Configurable Memory System on a Chip for 8-Bit Microcontrollers
PDF  110 Pages
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Fabricant  STMICROELECTRONICS [STMicroelectronics]
Site Internet  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

PSD833F2 Fiches technique(HTML) 75 Page - STMicroelectronics

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PSD8XX Family
PSD835G2
74
AC/DC
Parameters
The following tables describe the AD/DC parameters of the PSD8XX family:
t DC Electrical Specification
t AC Timing Specification
• PLD Timing
– Combinatorial Timing
– Synchronous Clock Mode
– Asynchronous Clock Mode
– Input Micro
⇔Cell Timing
• Microcontroller Timing
– Read Timing
– Write Timing
– Peripheral Mode Timing
– Power Down and Reset Timing
Following are issues concerning the parameters presented:
t In the DC specification the supply current is given for different modes of operation.
Before calculating the total power consumption, determine the percentage of time that
the PSD8XX is in each mode. Also, the supply power is considerably different if the
Turbo bit is "OFF".
t The AC power component gives the PLD, Flash memory, and SRAM mA/MHz
specification. Figures 32 and 32a show the PLD mA/MHz as a function of the number
of Product Terms (PT) used.
t In the PLD timing parameters, add the required delay when Turbo bit is "OFF".
Figure 32. PLD ICC /FrequencyConsumption (VCC = 5 V ± 10%)
0
10
20
30
40
60
70
80
90
100
110
VCC = 5V
50
010
15
5
20
25
HIGHEST COMPOSITE FREQUENCY AT PLD INPUTS (MHz)
TURBO
ON
(100%)
TURBO
ON
(25%)
TURBO
OFF
PT 100%
PT 25%



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