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STMPE801 Fiches technique(PDF) 16 Page - STMicroelectronics |
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STMPE801 Fiches technique(HTML) 16 Page - STMicroelectronics |
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16 / 26 page ![]() Interrupt, power supply & reset STMPE801 16/26 8 Interrupt, power supply & reset STMPE801 could be configured to generate an interrupt when there is a logic transition of any of the GPIO configured as input. 8.1 Interrupt enable GPIO mask register (IEGPIOR) IEGPIOR register is used to enable the interruption from a particular GPIO interrupt source to the host. The IEG[7:0] bits are the interrupt enable mask bits correspond to the GPIO[7:0] pins. IEGPIOR Bit 7 6 5 432 1 0 IEG7 IEG6 IEG5 IEG4 IEG3 IEG2 IEG1 IEG0 R/W RW RW RW RWRWRW RW RW Reset Value 0 0 0 000 0 0 Table 13. Register Bits Name Description 7:0 IEG[x] Interrupt Enable GPIO Mask (where x = 7 to 0) Writing a ‘1’ to the IE[x] bit will enable the interruption to the host. |
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