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CS5460 Fiches technique(PDF) 13 Page - Cirrus Logic

No de pièce CS5460
Description  Single Phase Bi-Directional Power/Energy IC
PDF  34 Pages
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Fabricant  CIRRUS [Cirrus Logic]
Site Internet  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

CS5460 Fiches technique(HTML) 13 Page - Cirrus Logic

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CS5460
DS279PP5
13
Therefore, the pulse rate register is programmed to
be :
To improve the accuracy, either gain register can
be programmed to correct for the round-off error in
PR. This value would be calculated as
To allow for a simpler interface in a multi-phase
system, the EOUT and EDIR pins can be connected
together and used in a wired-or configuration. The
parts must be driven with the same clock and pro-
grammed with different phases (PH[1:0] in the
Configuration register). The pulse width and the
pulse separation is an integer multiple of system
clocks (approximately equal to 1/8 of the period of
the contents of the pulse-rate register). The maxi-
mum frequency is therefore MCLK/K/8. A timing
diagram for a multi-phase system is shown in Fig-
ure 8.
PR
IR
R
v
×
R
i
×
11.574 Hz
≅
370 or 0x172
==
Ign or Vgn
PR
370
2
5
–
×
-----------------------
1.001
≅
0x401067
==
Phase - 00
Phase - 01
Phase - 10
Phase - 11
t
≅ Pulse-Rate Register Period
8
N
MCLK/K
=
for Integer N
t
t
Figure 8. Multi-Phase System



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