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STA027 Fiches technique(PDF) 20 Page - STMicroelectronics

No de pièce STA027
Description  SBC CODEC
PDF  44 Pages
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Fabricant  STMICROELECTRONICS [STMicroelectronics]
Site Internet  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STA027 Fiches technique(HTML) 20 Page - STMicroelectronics

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5 Register description
STA027
20/44
CD00066274
5.3.4
PLL_SYSTEM_XDIV_50 :
Address : 0xE9 (233)
Type : RW - DEC
Software Reset : 1
Description :
This register must contain a XDIV value that enables the system PLL to generate a frequency
of 50 MHZ for the SYSCK. See table 4.
Default value at soft reset assume :
–
external crystal provide a CRYCK running at 14.31818 MHz
5.3.5
PLL_SYSTEM_MDIV_50 :
Address : 0xEA (234)
Type : RW - DEC
Software Reset : 13
Description :
This register must contain a MDIV value that enables the system PLL to generate a frequency
of 50 MHz for the SYSCK. See table 4.
Default value at soft reset assume :
–
external crystal provide a CRYCK running at 14.31818 MHz
5.3.6
PLL_SYSTEM_PEL_42_5
Address : 0xE6 (230)
Type : RW - DEC
Software Reset : 126
Description :
This register must contain a PEL value that enables the system PLL to generate a frequency of
42.5 MHz for the SYSCK.See table 4.
Default value at soft reset assume :
–
external crystal provide a CRYCK running at 14.31818 MHz
b7
b6
b5
b4
b3
b2
b1
b0
b7
b6
b5
b4
b3
b2
b1
b0
b7
b6
b5
b4
b3
b2
b1
b0



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