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BQ40Z50-R1 Fiches technique(PDF) 44 Page - Texas Instruments |
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BQ40Z50-R1 Fiches technique(HTML) 44 Page - Texas Instruments |
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44 / 56 page ![]() Current Direction To SRP – SRN pin or HSRP – HSRN pin RSNS Current Sensing Direction bq40z50-R1 SLUSCB3 – JULY 2015 www.ti.com Layout Guidelines (continued) Figure 45. Sensing Resistor PCB Layout Figure 46. Sense Resistor, Ground Shield, and Filter Circuit Layout 11.1.1 Protector FET Bypass and Pack Terminal Bypass Capacitors The general principle is to use wide copper traces to lower the inductance of the bypass capacitor circuit. In Figure 47, an example layout demonstrates this technique. Figure 47. Use Wide Copper Traces to Lower the Inductance of Bypass Capacitors C1, C2, and C3 44 Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: bq40z50-R1 |
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